1)
x1 |
x2 |
x3 |
x4 |
|
Z1 |
Z2 |
Z3 |
Z4 |
Z5 |
Z6 |
Z7 |
0 |
0 |
0 |
0 |
|
1 |
1 |
1 |
0 |
1 |
1 |
1 |
0 |
0 |
0 |
1 |
|
0 |
0 |
1 |
0 |
0 |
1 |
0 |
0 |
0 |
1 |
0 |
|
1 |
0 |
1 |
1 |
1 |
0 |
1 |
0 |
0 |
1 |
1 |
|
1 |
0 |
1 |
1 |
0 |
1 |
1 |
0 |
1 |
0 |
0 |
|
0 |
1 |
1 |
1 |
0 |
1 |
0 |
0 |
1 |
0 |
1 |
|
1 |
1 |
1 |
1 |
0 |
0 |
1 |
0 |
1 |
1 |
0 |
|
1 |
1 |
0 |
1 |
1 |
1 |
1 |
0 |
1 |
1 |
1 |
|
1 |
0 |
1 |
0 |
0 |
1 |
0 |
1 |
0 |
0 |
0 |
|
1 |
1 |
1 |
1 |
1 |
1 |
1 |
1 |
0 |
0 |
1 |
|
1 |
1 |
1 |
1 |
0 |
1 |
0 |
1 |
0 |
1 |
0 |
|
X |
X |
X |
X |
X |
X |
X |
1 |
0 |
1 |
1 |
|
X |
X |
X |
X |
X |
X |
X |
1 |
1 |
0 |
0 |
|
X |
X |
X |
X |
X |
X |
X |
1 |
1 |
0 |
1 |
|
X |
X |
X |
X |
X |
X |
X |
1 |
1 |
1 |
0 |
|
X |
X |
X |
X |
X |
X |
X |
1 |
1 |
1 |
1 |
|
X |
X |
X |
X |
X |
X |
X |
Z1 = | = x1 + x3 + x1’x4’ + x2x4 | |
Z2 = | = x1 + x2x3’ + x2x4’ + x3’x4’ | |
Z3 = | = x1 +x2’ + x3x4 +x3’x4’ | |
Z4 = | = x1 +x2x3’ + x2’x3 +x2x4’ | |
Z5 = | = x2’x4’ +x3x4’ | |
Z6 = | = x2 +x3’ + x4 | |
Z7 = | = x2’x4’ + x2’x3 + x3x4’ +x2x3’x4 | |
D(x1, x2, x3, x4) = |
Design. a 5x32 decoder using four 3x8 decoders and one 2x4 decoder.